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rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a ad7816/ad7817/ad7818 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 world wide web site: http://www.analog.com fax: 781/326-8703 ? analog devices, inc., 2000 single- and 4-channel, 9 s, 10-bit adcs with on-chip temperature sensor functional block diagram features 10-bit adc with 9 s conversion time one (ad7818) and four (ad7817) single-ended analog input channels the ad7816 is a temperature measurement only device on-chip temperature sensor resolution of 0.25 c 2 c error from C40 c to +85 c C55 c to +125 c operating range wide operating supply range 2.7 v to 5.5 v inherent track-and-hold functionality on-chip reference (2.5 v 1%) over-temperature indicator automatic power-down at the end of a conversion low power operation 4 w at a throughput rate of 10 sps 40 w at a throughput rate of 1 ksps 400 w at a throughput rate of 10 ksps flexible serial interface applications ambient temperature monitoring (ad7816) thermostat and fan control high speed microprocessor temperature measurement and control data acquisition systems with ambient temperature monitoring (ad7817 and ad7818) industrial process control automotive battery charging applications general description the ad7818 and ad7817 are 10-bit, single- and 4-channel a/d converters with on-chip temperature sensor that can oper- ate from a single 2.7 v to 5.5 v power supply. each part con- tains a 9 s successive-approximation converter based around a capacitor dac, an on-chip temperature sensor with an accu- racy of 2 c, an on-chip clock oscillator, inherent track-and- hold functionality and an on-chip reference (2.5 v). the ad7816 is a temperature monitoring only device in a soic/ soic package. the on-chip temperature sensor of the ad7817 and ad7818 can be accessed via channel 0. when channel 0 is selected and a conversion is initiated, the resulting adc code at the end of the conversion gives a measurement of the ambient temperature with a r esolution of 0.25 c. see measuring temperature section of the data sheet. the ad7816, ad7817, and ad7818 have a flexible serial interface that allows easy interfacing to most microcontrollers. the interface is compatible with the intel 8051, motorola spi? and qspi? protocols and national semiconductors microwire? protocol. for more information refer to the serial interface section of this data sheet. the ad7817 is available in a narrow body 0.15" 16-lead small outline ic (soic), in a 16-lead, thin shrink small outline package (tssop), while the ad7816/ad7818 come in an 8-lead small outline ic (soic) and an 8-lead microsmall outline ic ( soic). product highlights 1. the devices have an on-chip temperature sensor that allows an accurate m easurement of the ambient temperature to be made. the measurable temperature range is C55 c to +125 c. 2. an over-temperature indicator is implemented by carrying out a digital comparison of the adc code for channel 0 (temperature sensor) with the contents of the on-chip over- temperature register. the over-temperature indicator pin goes logic low when a predetermined temperature is exceeded. 3. the automatic power-down feature enables the ad7816, ad7817, and ad7818 to achieve superior power perfor- mance at slower throughput rates, e.g., 40 w at 1 ksps throughput rate. spi and qspi are trademarks of motorola, inc. microwire is a trademark of national semiconductor corporation. charge redistribution dac clock d out sclk rd/ wr convst agnd control reg a b over-temp reg a > b oti control logic v balance sampling capacitor mux ref 2.5v temp sensor ref in v dd data out d in dgnd busy cs v in1 v in2 v in3 v in4 ad7817
C2C rev. b ad7816/ad7817/ad7818 parameter a version * b version * s version unit test conditions/comments dynamic performance sample rate = 100 ksps, any channel, f in = 20 khz signal to (noise + distortion) ratio 2 58 58 58 db min total harmonic distortion 2 C65 C65 C65 db max C75 db typ peak harmonic or spurious noise 2 C65 C65 C65 db max C75 db typ intermodulation distortion 2 fa =19.9 khz, fb = 20.1 khz second order terms C67 C67 C67 db typ third order terms C67 C67 C67 db typ channel-to-channel isolation 2 C80 C80 C80 db typ f in = 20 khz dc accuracy any channel resolution 10 10 10 bits minimum resolution for which no missing codes are guaranteed 10 10 10 bits relative accuracy 2 1 1 1lsb max differential nonlinearity 2 1 1 1lsb max gain error 2 2 2 2 lsb max external reference 10 10 +20/C10 lsb max internal reference gain error match 2 1/2 1/2 1/2 lsb max offset error 2 2 2 2lsb max offset error match 1/2 1/2 1/2 lsb max temperature sensor 1 measurement error external reference v ref = 2.5 v ambient temperature 25 c 2 1 2 c max t min to t max 3 2 3 c max measurement error on-chip reference ambient temperature 25 c 2.25 2.25 2.25 c max t min to t max 3 3 6 c max temperature resolution 1/4 1/4 1/4 c/lsb reference input 3, 4 ref in input voltage range 3 2.625 2.625 2.625 v max 2.5 v + 5% 2.375 2.375 2.375 v min 2.5 v C 5% input impedance 40 40 40 k ? min input capacitance 10 10 10 pf max on-chip reference 5 nominal 2.5 v temperature coefficient 3 80 80 150 ppm/ c typ conversion rate track/hold acquisition time 4 400 400 400 ns max source impedance < 10 ? conversion time temperature sensor 27 27 27 s max channels 1 to 4 9 9 9 s max power requirements v dd 5.5 5.5 5.5 v max for specified performance 2.7 2.7 2.7 v min i dd logic inputs = 0 v or v dd normal operation 2 2 2 ma max 1.6 ma typ using external reference 1.75 1.75 1.75 ma max 2.5 v external reference connected power-down (v dd = 5 v) 10 10 12.5 a max 5.5 a typ power-down (v dd = 3 v) 4 4 4.5 a max 2 a typ auto power-down mode v dd = 3 v 10 sps throughput rate 6.4 6.4 6.4 w typ see power vs. throughput section 1 ksps throughput rate 48.8 48.8 48.8 w typ for description of power dissipa- 10 ksps throughput rate 434 434 434 w typ tion in auto power-down mode power-down 12 12 13.5 w max typically 6 w ad7817Cspecifications 1 (v dd = 2.7 v to 5.5 v, gnd = 0 v, ref in = 2.5 v unless otherwise noted)
C3C rev. b ad7816/ad7818 6 Cspecifications 1 (v dd = 2.7 v to 5.5 v, gnd = 0 v, ref in = 2.5 v unless otherwise noted) parameter a version unit test conditions/comments dynamic performance (ad7818 only) sample rate = 100 ksps, any channel, f in = 20 khz signal to (noise + distortion) ratio 2 57 db min total harmonic distortion 2 C65 db max C75 db typ peak harmonic or spurious noise 2 C67 db typ C75 db typ intermodulation distortion 2 fa = 19.9 khz, fb = 20.1 khz second order terms C67 db typ third order terms C67 db typ channel-to-channel isolation 2 C80 db typ f in = 20 khz dc accuracy (ad7818 only) any channel resolution 10 bits minimum resolution for which no missing codes are guaranteed 10 bits relative accuracy 2 1lsb max differential nonlinearity 2 1lsb max gain error 2 10 lsb max offset error 2 4lsb max temperature sensor 1 measurement error external reference v ref = 2.5 v ambient temperature 25 c 2 c max t min to t max 3 c max measurement error on-chip reference ambient temperature 25 c 2 c max t min to t max 3 c max temperature resolution 1/4 c/lsb reference input 3, 4 (ad7816 only) ref in input voltage range 3 2.625 v max 2.5 v + 5% 2.375 v min 2.5 v C 5% input impedance 50 k ? min input capacitance 10 pf max on-chip reference 5 nominal 2.5 v temperature coefficient 3 30 ppm/ c typ conversion rate track/hold acquisition time 4 400 ns max source impedance < 10 ? conversion time temperature sensor 27 s max channel 1 9 s max (ad7818 only) power requirements v dd 5.5 v max for specified performance 2.7 v min i dd logic inputs = 0 v or v dd normal operation 2 ma max 1.3 ma typ using external reference 1.75 ma max 2.5 v external reference connected power-down (v dd = 5 v) 10.75 a max 6 a typ power-down (v dd = 3 v) 4.5 a max 2 a typ auto power-down mode v dd = 3 v 10 sps throughput rate 6.4 w typ see power vs. throughput section for 1 ksps throughput rate 48.8 w typ description of power dissipation in 10 ksps throughput rate 434 w typ auto power-down mode power-down 13.5 w max typically 6 w ad7816/ad7817/ad7818
C4C parameter a version * b version * s version unit test conditions/comments analog inputs 7 (ad7817 and ad7818) input voltage range v ref v ref v ref v max 000v min input leakage 1 1 1 a min input capacitance 10 10 10 pf max logic inputs 4 input high voltage, v inh 2.4 2.4 2.4 v min v dd = 5 v 10% input low voltage, v inl 0.8 0.8 0.8 v max v dd = 5 v 10% input high voltage, v inh 222v minv dd = 3 v 10% input low voltage, v inl 0.4 0.4 0.4 v max v dd = 3 v 10% input current, i in 3 3 3 a max typically 10 na, v in = 0 v to v dd input capacitance, c in 10 10 10 pf max logic outputs 4 output high voltage, v oh i source = 200 a 444v minv dd = 5 v 10% 2.4 2.4 2.4 v min v dd = 3 v 10% output low voltage, v ol i sink = 200 a 0.4 0.4 0.4 v max v dd = 5 v 10% 0.2 0.2 0.2 v max v dd = 3 v 10% high impedance leakage current 1 1 1 a max high impedance capacitance 15 15 15 pf max notes * b and s versions apply to ad7817 only. for operating temperature ranges, see ordering guide. 1 ad7816 and ad7817 temperature sensors specified with external 2.5 v reference, ad7818 specified with on-chip reference. all oth er specifications with external and on-chip reference (2.5 v). for v dd = 2.7 v, t a = 85 c max and temperature sensor measurement error = 3 c. 2 see terminology. 3 the accuracy of the temperature sensor is affected by reference tolerance. the relationship between the two is explained in the section titled temperature measure- ment error due to reference error. 4 sample tested during initial release and after any redesign or process change that may affect this parameter. 5 on-chip reference shuts down when external reference is applied. 6 all specifications are typical for ad7818 at temperatures above 85 c and with v dd greater than 3.6 v. 7 refers to the input current when the part is not converting. primarily due to reverse leakage current in the esd protection dio des. specifications subject to change without notice. charge redistribution dac clock data out d in/ out sclk rd/ wr convst agnd control reg a b over-temp reg a > b oti control logic v balance sampling capacitor mux ref 2.5v temp sensor ref in v dd ad7816 figure 1. ad7816 functional block diagram charge redistribution dac clock generator data out d in/ out sclk rd/ wr convst agnd control reg a b over-temp reg a > b oti control logic v balance sampling capacitor mux ref 2.5v temp sensor v dd v in1 ad7818 figure 2. ad7818 functional block diagram ad7816/ad7817/ad7818Cspecifications 1 rev. b
ad7816/ad7817/ad7818 C5C rev. b timing characteristics 1, 2 parameter a, b versions unit test conditions/comments t power-up 2 s max power-up time from rising edge of convst t 1a 9 s max conversion time channels 1 to 4 t 1b 27 s max conversion time temperature sensor t 2 20 ns min convst pulsewidth t 3 50 ns max convst falling edge to busy rising edge t 4 0 ns min cs falling edge to rd/ wr falling edge setup time t 5 0 ns min rd/ wr falling edge to sclk falling edge setup t 6 10 ns min d in setup time before sclk rising edge t 7 10 ns min d in hold time after sclk rising edge t 8 40 ns min sclk low pulsewidth t 9 40 ns min sclk high pulsewidth t 10 0 ns min cs falling edge to rd/ wr rising edge setup time t 11 0 ns min rd/ wr rising edge to sclk falling edge setup time t 12 3 20 ns max d out access time after rd/ wr rising edge t 13 3 20 ns max d out access time after sclk falling edge t 14a 3, 4 30 ns max d out bus relinquish time after falling edge of rd/ wr t 14b 3, 4 30 ns max d out bus relinquish time after rising edge of cs t 15 150 ns max busy falling edge to oti falling edge t 16 40 ns min rd/ wr rising edge to oti rising edge t 17 400 ns min sclk rising edge to convst falling edge (acquisition time of t/h) notes 1 sample tested during initial release and after any redesign or process change that may affect this parameter. all input signals are measured with tr = tf = 1 ns (10% to 90% of 5 v) and timed from a voltage level of 1.6 v. 2 see figures 16, 17, 20 and 21. 3 these figures are measured with the load circuit of figure 3. they are defined as the time required for d out to cross 0.8 v or 2.4 v for v dd = 5 v 10% and 0.4 v or 2 v for v dd = 3 v 10%, as quoted on the specifications page of this data sheet. 4 these times are derived from the measured time taken by the data outputs to change 0.5 v when loaded with the circuit of figure 3. the measured number is then extrapolated back to remove the effects of charging or discharging the 50 pf capacitor. this means that the times quoted in the timing characteristics are the true bus relinquish times of the part and as such are independent of external bus loading capacitances. specifications subject to change without notice. 1.6v i ol 200 a 200 a i ol to output pin c l 50pf figure 3. load circuit for access time and bus relinquish time (v dd = 2.7 v to 5.5 v, gnd = 0 v, ref in = 2.5 v. all specifications t min to t max unless otherwise noted)
ad7816/ad7817/ad7818 C6C rev. b caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ad7816/ad7817/ad7818 feature proprietary esd protection circuitry, perma- nent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. absolute maximum ratings 1 ( t a = 25 c unless otherwise noted) v dd to agnd . . . . . . . . . . . . . . . . . . . . . . . . . C0.3 v to +7 v v dd to dgnd . . . . . . . . . . . . . . . . . . . . . . . . . C0.3 v to +7 v analog input voltage to agnd v in1 to v in4 . . . . . . . . . . . . . . . . . . . C0.3 v to v dd + 0.3 v reference input voltage to agnd 2 . . . C0.3 v to v dd + 0.3 v digital input voltage to dgnd . . . . . . C0.3 v to v dd + 0.3 v digital output voltage to dgnd . . . . . C0.3 v to v dd + 0.3 v storage temperature range . . . . . . . . . . . . C65 c to +150 c junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150 c tssop, power dissipation . . . . . . . . . . . . . . . . . . . . 450 mw ja thermal impedance . . . . . . . . . . . . . . . . . . . . . 120 c/w lead temperature, soldering . . . . . . . . . . . . . . . . . . 260 c vapor phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . 215 c infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 220 c 16-lead soic package, power dissipation . . . . . . . . 450 mw ja thermal impedance . . . . . . . . . . . . . . . . . . . . . 100 c/w lead temperature, soldering vapor phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . 215 c infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 220 c 8-lead soic package, power dissipation . . . . . . . . . 450 mw ja thermal impedance . . . . . . . . . . . . . . . . . . . . . 157 c/w lead temperature, soldering vapor phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . 215 c infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 220 c ordering guide temperature temperature package branding package model range error @ +25 c description information options ad7816ar C55 c to +125 c 2 c 8-lead narrow body (soic) so-8 ad7816arm C55 c to +125 c 2 c 8-lead soic c4a rm-8 ad7817ar C40 c to +85 c 2 c 16-lead narrow body (soic) r-16a ad7817br C40 c to +85 c 1 c 16-lead narrow body (soic) r-16a ad7817aru C40 c to +85 c 2 c 16-lead (tssop) ru-16 ad7817bru C40 c to +85 c 1 c 16-lead (tssop) ru-16 ad7817sr C55 c to +125 c 2 c 16-lead narrow body (soic) r-16a ad7818ar C55 c to +125 c 2 c 8-lead narrow body (soic) so-8 ad7818arm C55 c to +125 c 2 c 8-lead soic c3a rm-8 soic package, power dissipation . . . . . . . . . . . . . . 450 mw ja thermal impedance . . . . . . . . . . . . . . . . . . . . . 206 c/w lead temperature, soldering vapor phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . 215 c infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 220 c notes 1 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. exposure to absolute maximum rating condi- tions for extended periods may affect device reliability. 2 if the reference input voltage is likely to exceed v dd by more than 0.3 v (e.g., during power-up) and the reference is capable of supplying 30 ma or more, it is recommended to use a clamping diode between the ref in pin and v dd pin. the diagram below shows how the diode should be connected. ref in v dd bat81 ad7816/ad7817 warning! esd sensitive device
ad7816/ad7817/ad7818 C7C rev. b ad7817 pin function descriptions pin mnemonic description 1 convst logic input signal. the convert start signal. a 10-bit analog-to-digital conversion is initiated on the falling edge of this signal. the falling edge of this signal places the track/hold in hold mode. the track/ hold goes into track mode again at the end of the conversion. the state of the convst signal is checked at the end of a conversion. if it is logic low, the ad7817 will power-downsee operating mode section of the data sheet. 2 busy logic output. the busy signal is logic high during a temperature or voltage a/d conversion. the signal can be used to interrupt a microcontroller when a conversion has finished. 3 oti logic output. the over-temperature indicator ( oti ) is set logic low if the result of a conversion on channel 0 (temperature sensor) is greater that an eight bit word in the over-temperature register (otr). the signal is reset at the end of a serial read operation, i.e., a rising rd/ wr edge when cs is low. 4 cs logic input signal. the chip select signal is used to enable the serial port of the ad7817. this is neces- sary if the ad7817 is sharing the serial bus with more than one device. 5 agnd analog ground. ground reference for track/hold, comparator and capacitor dac. 6 ref in analog input. an external 2.5 v reference can be connected to the ad7817 at this pin. to enable the on- chip reference the ref in pin should be tied to agnd. if an external reference is connected to the ad7817, the internal reference will shut down. 7C10 v in1 to v in4 analog input channels. the ad7817 has four analog input channels. the input channels are single- ended with respect to agnd (analog ground). the input channels can convert voltage signals in the range 0 v to v ref . a channel is selected by writing to the address register of the ad7817see control byte section. 11 v dd positive supply voltage, 2.7 v to 5.5 v. 12 dgnd digital ground. ground reference for digital circuitry. 13 d out logic output with a high impedance state. data is clocked out of the ad7817 serial port at this pin. this output goes into a high impedance state on the falling edge of rd/ wr or on the rising edge of the cs signal, whichever occurs first. 14 d in logic input. data is clocked into the ad7817 at this pin. 15 sclk clock input for the serial port. the serial clock is used to clock data into and out of the ad7817. data is clocked out on the falling edge and clocked in on the rising edge. 16 rd/ wr logic input signal. the read/write signal is used to indicate to the ad7817 whether the data transfer operation is a read or a write. the rd/ wr should be set logic high for a read operation and logic low for a write operation. pin configuration soic/tssop 14 13 12 11 16 15 10 9 8 1 2 3 4 7 6 5 top view (not to scale) ad7817 convst d out d in sclk rd/ wr busy o t i cs v in4 v dd dgnd agnd ref in v in1 v in2 v in3
ad7816/ad7817/ad7818 C8C rev. b ad7816 and ad7818 pin function descriptions pin mnemonic description 1 convst logic input signal. the convert start signal initiates a 10-bit analog-to-digital conversion on the falling edge of the this signal. the falling edge of this signal places the track/hold in hold mode. the track/hold goes into track mode again at the end of the conversion. the state of the convst signal is checked at the end of a conversion. if it is logic low, the ad7816 and ad7818 will power downsee operating mode section of the data sheet. 2 oti logic output. the over-temperature indicator ( oti ) is set logic low if the result of a conver- sion on channel 0 (temperature sensor) is greater that an 8-bit word in the over-tem- perature register (otr). the signal is reset at the end of a serial read operation, i.e., a rising rd/ wr edge. 3 gnd analog and digital ground. 4 (ad7818) v in analog input channel. the input channel is single-ended with respect to gnd. the input channel can convert voltage signals in the range 0 v to 2.5 v. the input channel is selected by writing to the address register of the ad7818see control byte section. 4 (ad7816) ref in reference input. an external 2.5 v reference can be connected to the ad7816 at this pin. to enable the on-chip reference the ref in pin should be tied to agnd. if an external reference is connected to the ad7816, the internal reference will shut down. 5v dd positive supply voltage, 2.7 v to 5.5 v. 6d in/out logic input and output. serial data is clocked in and out of the ad7816/ad7818 at this pin. 7 sclk clock input for the serial port. the serial clock is used to clock data into and out of the ad7816/ad7818. data is clocked out on the falling edge and clocked in on the rising edge. 8 rd/ wr logic input. the read/write signal is used to indicate to the ad7816 and ad7818 w hether the next data transfer operation is a read or a write. the rd/ wr should be set logic high for a read operation and logic low for a write. pin configurations soic/ soic (ad7816) 1 2 3 4 8 7 6 5 top view (not to scale) ad7816 convst d in/out sclk rd/ wr v dd gnd ref in oti soic/ soic (ad7818) 1 2 3 4 8 7 6 5 top view (not to scale) ad7818 convst d in/out sclk rd/ wr v dd gnd v in oti terminology signal to (noise + distortion) ratio this is the measured ratio of signal to (noise + distortion) at the output of the a/d converter. the signal is the rms amplitude of the fundamental. noise is the rms sum of all nonfunda men- tal signals up to half the sampling frequency (f s /2), excluding dc. the ratio is dependent upon the number of quantization levels in the digitization process; the more levels, the smaller the quantization noise. the theoretical signal to (noise + distortion) ratio for an ideal n-bit converter with a sine wave input is given by: signal to (noise + distortion ) = (6.02 n + 1.76) db thus for a 10-bit converter, this is 62 db. total harmonic distortion total harmonic distortion (thd) is the ratio of the rms sum of harmonics to the fundamental. for the ad7891 it is defined as: thd ( db ) = 20 log v 2 2 + v 3 2 + v 4 2 + v 5 2 + v 6 2 v 1 where v 1 is the rms amplitude of the fundamental and v 2 , v 3 , v 4 , v 5 and v 6 are the rms amplitudes of the second through the sixth harmonics. peak harmonic or spurious noise peak harmonic or spurious noise is defined as the ratio of the rms value of the next largest component in the adc output spectrum (up to f s /2 and excluding dc) to the rms value of the fundamental. normally, the value of this specification is deter- mined by the largest harmonic in the spectrum, but for parts where the harmonics are buried in the noise floor, it will be a noise peak. intermodulation distortion with inputs consisting of sine waves at two frequencies, fa and fb, any active device with nonlinearities will create distortion products at sum and difference frequencies of mfa nfb where m, n = 0, 1, 2, 3, etc. intermodulation terms are those for which neither m nor n are equal to zero. for example, the second order terms include (fa + fb) and (fa C fb), while the third order terms include (2fa + fb), (2fa C fb), (fa + 2fb) and (fa C 2fb).
ad7816/ad7817/ad7818 C9C rev. b control byte the ad7816, ad7817, and ad7818 contain two on-chip regis- ters, the address register and the over-temperature register. these registers can be accessed by carrying out an 8-bit serial write operation to the devices. the 8-bit word or control byte written to the ad7816, ad7817, and ad7818 is transferred to one of the two on-chip registers as follows. the ad7816, ad7817, and ad7818 are tested using the ccif standard where two input frequencies near the top end of the input bandwidth are used. in this case, the second and third order terms are of different significance. the s econd order terms are usually distanced in frequency from the original sine waves while the third order terms are usually at a frequency close to the input frequencies. as a result, the second and third order terms are specified separately. the calculation of the intermodu- lation distortion is as per the thd specification where it is the ratio of the rms sum of the individual distortion products to the rms amplitude of the fundamental expressed in dbs. channel-to-channel isolation channel-to-channel isolation is a measure of the level of crosstalk between channels. it is measured by applying a full- scale 20 khz sine wave signal to one input channel and deter- mining how much that signal is attenuated in each of the other channels. the figure given is the worst case across all four channels. relative accuracy relative accuracy or endpoint nonlinearity is the maximum deviation from a straight line passing through the endpoints of the adc transfer function. differential nonlinearity this is the difference between the measured and the ideal 1 lsb change between any two adjacent codes in the adc. offset error this is the deviation of the first code transition (0000 . . . 000) to (0000 . . . 001) from the ideal, i.e., agnd + 1 lsb. offset error match this is the difference in offset error between any two channels. gain error this is the deviation of the last code transition (1111 . . . 110) to (1111 . . . 111) from the ideal, i.e., vref C 1 lsb, after the offset error has been adjusted out. gain error match this is the difference in gain error between any two channels. track/hold acquisition time track/hold acquisition time is the time required for the output of the track/hold amplifier to reach its final value, within 1/2 lsb, after the end of conversion (the point at which the track/hold returns to track mode). it also applies to situations where a change in the selected input channel takes place or where there is a step input change on the input voltage applied to the selected v in input of the ad7817 or ad7818. it means that the user must wait for the duration of the track/hold acqui- sition time after the end of conversion or after a channel change/ step input change to v in before starting another conversion, to ensure that the part operates to specification. address register if the five msbs of the control byte are logic zero, the three lsbs of the control byte are transferred to the address regis- tersee figure 4. the address register is a 3-bit-wide register used to select the analog input channel on which to carry out a conversion. it is also used to select the temperature sensor, which has the address 000. table i shows the selection. the internal reference selection connects the input of the adc to a band gap reference. when this selection is made and a conver- sion is initiated, the adc output should be approximately mid- scale. after power-up the default channel selection is db2 = db1 = db0 = 0 (tem perature sensor). table i. channel selection db2 db1 db0 channel selection device 0 0 0 temperature sensor all 0 0 1 channel 1 ad7817/ad7818 0 1 0 channel 2 ad7817 0 1 1 channel 3 ad7817 1 0 0 channel 4 ad7817 1 1 1 internal ref (1.23 v) all over-temperature register if any of the five msbs of the control byte are logic one then the entire eight bits of the control byte are transferred to the over- temperature registersee figure 4. at the end of a tempera- ture conversion a digital comparison is carried out between the 8 msbs of the temperature conversion result (10 bits) and the contents of the over-temperature register (8 bits). if the result of the temperature conversion is greater that the contents of the over-temperature register (otr), then the over-temperature indicator ( oti ) goes logic low. the resolution of the otr is 1 c. the lowest temperature that can be written to the otr is C95 c and the highest is +152 csee figure 5. however, the usable temperature range of the temperature sensor is C55 c to +125 c. figure 5 shows the otr and how to set t alarm (the temperature at which the oti goes low). otr ( dec ) = t alarm ( c ) + 103 c for example, to set t alarm to 50 c, otr = 50 + 103 = 153 dec or 10011001 bin. if the result of a temperature conversion exceeds 50 c then oti will go logic low. the oti logic output is reset high at the end of a serial read operation or if a new temperature measurement is lower than t alarm . the default power on t alarm is 50 c. db0 db1 db2 db3 db4 db5 db6 db7 msb lsb control byte db0 db1 db2 address register over-temperature register ( otr ) if any bit db7 to db3 is set to a logic '1' then the full 8 bits of the control word are written to the over-temperature register if db7 to db3 are logic '0' then db2 to db0 are written to the address register db0 db1 db2 db3 db4 db5 db6 db7 figure 4. address and over-temperature register selection
ad7816/ad7817/ad7818 C10C rev. b msb lsb 0000 000 1 minimum temperature = ?5 c 11111111 maximum temperature = +152 c over-temperature register (dec) = t alarm + 103 c t alarm resolution = 1 / lsb over-temperature register db0 db1 db2 db3 db4 db5 db6 db7 figure 5. the over-temperature register (otr) circuit information the ad7817 and ad7818 are single- and four-channel, 9 s conversion time, 10-bit a/d converters with on-chip tempera- ture sensor, reference and serial interface logic functions on a single chip. the ad7816 has no analog input channel and is intended for temperature measurement only. the a/d converter section consists of a conventional successive-approximation converter based around a capacitor dac. the ad7816, ad7817, and ad7818 are capable of running on a 2.7 v to 5.5 v power supply and the ad7817 and ad7818 accept an analog input range of 0 v to +v ref . the on-chip temperature sensor allows an accurate measurement of the ambient device temperature to be made. the working measurement range of the temperature sensor is C55 c to +125 c. the part requires a 2.5 v reference, which can be provided from the parts own internal reference or from an external reference source. the on-chip reference is selected by connecting the ref in pin to analog ground. converter details conversion is initiated by pulsing the convst input. the conversion clock for the part is internally generated so no exter- nal clock is required except when reading from and writing to the serial port. the on-chip track/hold goes from track-to-hold mode and the conversion sequence is started on the falling edge of the convst signal. at this point the busy signal goes high and low again 9 s or 27 s later (depending on whether an analog input or the temperature sensor is selected) to indicate the end of the conversion process. this signal can be used by a microcontroller to determine when the result of the conversion should be read. the track/hold acquisition time of the ad7817 and ad7818 is 400 ns. a temperature measurement is made by selecting the channel 0 of the on-chip mux and carrying out a conversion on this channel. a conversion on channel 0 takes 27 s to complete. temperature measurement is explained in the temperature measurement section of this data sheet. the on-chip reference is not available to the user, but ref in can be overdriven by an external reference sou rce (2.5 v only). the effect of reference tolerances on temperature measurements is discussed in the section titled temperature measurement error due to reference error. all unused analog inputs should be tied to a voltage within the nominal analog input range to avoid noise pickup. for mini- mum power consumption, the unused analog inputs should be tied to agnd. typical connection diagram figure 6 shows a typical connection diagram for the ad7817. the agnd and dgnd are connected together at the device for good noise suppression. the busy line is used to interrupt the microcontroller at the end of the conversion process and the serial interface is implemented using three wiressee serial interface section for more details. an external 2.5 v reference can be connected at the ref in pin. if an external reference is used, a 10 f capacitor should be connected between ref in and agnd. for applications where power consumption is of concern, the automatic power-down at the end of a conversion should be used to improve power performance. see power- down section of the data sheet. v dd ain1 convst agnd dgnd ref in supply 2.7v to 5.5v 0.1 f 10 f 10 f external reference optional external reference ad780/ ref-192 0v to 2.5v input d out rd/ wr ain2 ain3 ain4 d in busy oti c/ p sclk three-wire serial interface cs ad7817 figure 6. typical connection diagram analog inputs analog input figure 7 shows an equivalent circuit of the analog input struc- ture of the ad7817 and ad7818. the two diodes d1 and d2 provide esd protection for the analog inputs. care must be taken to ensure that the analog input signal never exceeds the supply rails by more than 200 mv. this will cause these diodes to become forward biased and start conducting current into the substrate. the maximum current these diodes can conduct without causing irreversibly damage to the part is 20 ma. the capacitor c2 in figure 7 is typically about 4 pf and can mostly be attributed to pin capacitance. the resistor r1 is a lumped component made up of the on resistance of a multiplexer and a switch. this resistor is typically about 1 k ? . the capacitor c1 is the adc sampling capacitor and has a capacitance of 3 pf.
ad7816/ad7817/ad7818 C11C rev. b 1.2v ref in sw1 2.5v external reference detect buffer 1.2v 26k 24k figure 9. on-chip reference adc transfer function the output coding of the ad7816, ad7817, and ad7818 is straight binary. the designed code transitions occur at succes- sive integer lsb values (i.e., 1 lsb, 2 lsbs, etc.). the lsb size is = 2.5 v/1024 = 2.44 mv. the ideal transfer characteristic shown in figure 10 below. analog input 0v 1lsb +2.5v 1lsb 1lsb=2.5/1024 2.44mv adc code 111...111 111...110 111...000 011...111 000...010 000...001 000...000 figure 10. adc transfer function temperature measurement the on-chip temperature sensor can be accessed via multiplexer channel 0, i.e., by writing 0 0 0 to the channel address regis- ter. the temperature is also the power on default selection. the transfer characteristic of the temperature sensor is shown in figure 11 below. the result of the 10-bit conversion on chan- nel 0 can be converted to degrees centigrade by using the fol- lowing equation. t amb = C103 c + ( adc code /4) 55 c 125 c 192dec 912dec temperature adc code figure 11. temperature sensor transfer characteristic a in d1 c1 3pf v dd d2 c2 4pf v balance convert phase - switch open track phase - switch closed r1 1k figure 7. equivalent analog input circuit dc acquisition time the adc starts a new acquisition phase at the end of a conver- sion and ends on the falling edge of the convst signal. at the end of a conversion a settling time is associated with the sam- pling circuit. this settling time lasts approximately 100 ns. the analog signal on v in + is also being acquired during this settling time. therefore, the minimum acquisition time needed is approximately 100 ns. figure 8 shows the equivalent charging circuit for the sampling capacitor when the adc is in its acquisition phase. r2 repre- sents the source impedance of a buffer amplifier or re sistive network, r1 is an internal multiplexer resistance and c1 is the sampling capacitor. v in c1 3pf r2 r1 1k figure 8. equivalent sampling circuit during the acquisition phase the sampling capacitor must be charged to within a 1/2 lsb of its final value. the time it takes to charge the sampling capacitor (t charge ) is given by the following formula: t charge = 7.6 ( r 2 + 1 k ? ) 3 pf for small values of source impedance, the settling time associ- ated with the sampling circuit (100 ns) is, in effect, the acquisi- tion time of the adc. for example with a source impedance (r2) of 10 ? the charge time for the sampling capacitor is approxi- mately 23 ns. the charge time becomes significant for source impedances of 1 k ? and greater. ac acquisition time in ac applications it is recommended to always buffer analog input signals. the source impedance of the drive circuitry must be kept as low as possible to minimize the acquisition time of the adc. large values of source impedance will cause the thd to degrade at high throughput rates. on-chip reference the ad7816, ad7817, and ad7818 have an on-chip 1.2 v band gap reference that is gained up to give an output of 2.5 v. the on-chip reference is selected by connecting the ref in pin to analog ground. this causes sw1 (see figure 9) to open and the reference amplifier to power up during a conversion. there- fore the on-chip reference is not available externally. an ex ternal 2.5 v reference can be connected to the ref in pin. this has the effect of shutting down the on-chip reference circuitry and reduc- ing i dd by about 0.25 ma.
ad7816/ad7817/ad7818 C12C rev. b for example, if the result of a conversion on channel 0 was 1000000000 (512 dec), the ambient temperature is equal to C103 c + (512/4) = +25 c. table ii below shows some adc codes for various temperatures. table ii. temperature sensor output adc code temperature 00 1100 0000 C55 c 01 0011 1000 C25 c 01 1001 1100 0 c 10 0000 0000 +25 c 10 0111 1000 +55 c 11 1001 0000 +125 c temperature measurement error due to reference error the ad7816, ad7817, and ad7818 are trimmed using a pre- cision 2.5 v reference to give the transfer function described previously. to show the effect of the reference tolerance on a temperature reading, the temperature sensor transfer function can be rewritten as a func tion of the reference voltage and the temperature. c ode ( dec ) = ([113.3285 k t ] / [ q v ref ] ? 0.6646) 1024 where k = boltzmanns constant, 1.38 10 C23 q = charge on an electron, 1.6 10 C19 t = temperature (k) so, for example, to calculate the adc code at 25 c code = ([113.3285 298 1.38 10 C23 ]/[1.6 10 C19 2.5] C 0.6646) 1024 = 511.5 (200 hex) as can be seen from the expression, a reference error will pro- duce a gain error. this means that the temperature measure- ment error due to reference error will be greater at higher temperatures. for example, with a reference error of C1%, the measurement error at C55 c would be 2.2 lsbs (0.5 c) and 16 lsbs (4 c) at 125 c. self-heating considerations the ad7817 and ad7818 have an analog-to-digital conversion function capable of a throughput rate of 100 ksps. at this throughput rate the ad7817 and ad7818 will consume between 4 mw and 6.5 mw of power. because a thermal impedance is associated with the ic package, the temperature of the die will rise as a result of this power dissipation. the graphs below show the self-heating effect in a 16-lead soic package. figures 12 and 13 show the self-heating effect on a two-layer and four-layer pcb. the plots were generated by assembling a heater (resistor) and temperature sensor (diode) in the package being evaluated. in figure 12, the heater (6 mw) is turned off after 30 sec. the pcb has little influence on the self-heating over the first few seconds after the heater is turned on. this can be more clearly seen in figure 13 where the heater is switched off after 2 sec- onds. figure 14 shows the relative effects of self-heating in air, fluid and in thermal contact with a large heat sink. these diagrams represent the worst case effects of self-heating. the heater delivered 6 mw to the interior of the package in all cases. this power level is equivalent to the adc continuously converting at 100 ksps. the effects of the self-heating can be reduced at lower adc throughput rates by operating on mode 2see operating modes section. when operating in this mode, the on-chip power dissipation reduces dramatically and, as a consequence, the self-heating effects. time secs temperature c 0.50 0.05 060 10 20 30 40 50 0.45 0.30 0.15 0.10 0.05 0.40 0.35 0.25 0.20 0.00 4-layer pcb 2-layer pcb figure 12. self-heating effect two-layer and four-layer pcb time secs temperature c 0.25 0.05 05 1234 0.15 0.05 0.20 0.10 0.00 4-layer pcb 2-layer pcb figure 13. self-heating effect two-layer and four-layer pcb
ad7816/ad7817/ad7818 C13C rev. b db0 db7 db0 - db7(db9) d out convst sclk busy cs rd/ wr d in oti t 2 t 1 t 17 t 15 t 16 t 3 figure 16. mode 1 operation time secs temperature c 0.8 0.01 016 4 6 10 12 0.5 0.2 0.7 0.4 0.0 air 0.6 0.3 0.1 28 14 fluid heatsink figure 14. self-heating effect in air, fluid and in thermal contact with a heatsink time secs temperature c 0.25 0.05 0.0 2.0 0.5 1.5 0.15 0.05 0.10 0.00 air 1.0 fluid heatsink 0.20 figure 15. self-heating effect in air, fluid and in thermal contact with a heatsink operating modes the ad7816, ad7817, and ad7818 have two possible modes of operation depending on the state of the convst pulse at the end of a conversion. mode 1 in this mode of operation the convst pulse is brought high before the end of a conversion, i.e., before the busy goes low (see figure 16). when operating in this mode a new conversion should not be initiated until 100 ns after the end of a serial read operation. this quiet time is to allow the track/hold to accu- rately acquire the input signal after a serial read. mode 2 when the ad7816, ad7817, and ad7818 are operated in mode 2 (see figure 17), they automatically power down at the end of a conversion. the convst is brought low to initiate a conver- sion and is left logic low until after the end of the conversion. at this point, i.e., when busy goes low, the devices will power- down. the devices are powered up again on the rising edge of the convst signal. superior power performance can be achieved in this mode of operation by powering up the ad7816, ad7817, and ad7818 only to carry out a conversion (see power vs. throughput section).
ad7816/ad7817/ad7818 C14C rev. b throughput khz 10 1 0.01 080 10 power mw 0.1 20 30 40 50 60 70 figure 19. power vs. throughput rate ad7817 serial interface the serial interface on the ad7817 is a five-wire interface with read and write capabilities, with data being read from the output register via the d out line and data being written to the control register via the d in line. the part operates in a slave mode and requires an externally applied serial clock to the sclk input to access data from the data register or write to the control byte. the rd/ wr line is used to determine whether data is being written to or read from the ad7817. when data is being written to the ad7817, the rd/ wr line is set logic low and when data is being read from the part the line is set logic highsee figure 20. the serial interface on the ad7817 is designed to allow the part to be interfaced to systems that provide a serial clock that is synchronized to the serial data, such as the 80c51, 87c51, 68hc11, 68hc05, and pic16cxx microcontrollers. db0 db7 db0 db7(db9) d out convst sclk busy cs rd/ wr d in oti t 15 t 16 t 3 t power-up t 1 figure 17. mode 2 operation power vs. throughput superior power performance can be achieved by using the auto- matic power-down (mode 2) at the end of a conversionsee operating modes section of the data sheet. t power-up t convert convst busy 2 s 8 s t cycle 100ms @ 10ksps figure 18. automatic power-down figure 18 shows how the automatic power-down is imple- mented to achieve the optimum power performance from the ad7816, ad7817, and ad7818. the devices are operated in mode 2 and the duration of convst pulse is set to be equal to the power-up time (2 s). as the throughput rate of the device is reduced the device remains in its power-down state longer, and the average power consumption over time drops accordingly. for example, if the ad7817 is operated in a continuous sam- pling mode with a throughput rate of 10 ksps, the power con- sumption is calculated as follows. the power dissipation during normal operation is 4.8 mw, v dd = 3 v. if the power up time is 2 s and the conversion time is 9 s, the ad7817 can be said to dissipate 4.8 mw typically for 11 s (worst case) during each conversion cycle. if the throughput rate is 10 ksps, the cycle time is 100 s and the power dissipated while powered up dur- ing each cycle is (11/100) (4.8 mw) = 528 w typ. power dissipated while powered down during each cycle is (89/100) (3 v 2 a) = 5.34 w typ. overall power dissipated is 528 w + 5.34 w = 533 w.
ad7816/ad7817/ad7818 C15C rev. b read operation figure 20 shows the timing diagram for a serial read from the ad7817. cs is brought low to enable the serial interface and rd/ wr is set logic high to indicate that the data transfer is a serial read from the ad7817. the rising edge of rd/ wr clocks out the first data bit (db9), subsequent bits are clocked out on the falling edge of sclk and are valid on the rising edge. ten bits of data are transferred during a read operation. however, the user has the choice of clocking only eight bits if the full ten bits of the conversion result are not required. the serial data can be accessed in a number of bytes if ten bits of data are being read. however, rd/ wr must remain high for the duration of the data transfer operation. before starting a new data read operation the rd/ wr signal must brought low and high again. at the end of the read operation, the d out line enters a high impedance state on the rising edge of the cs or the falling edge of rd/ wr , whichever occurs first. write operation figure 20 also shows a control byte write operation to the ad7817. the rd/ wr input goes low to indicate to the part that a serial write is about to occur. the ad7817 control byte is loaded on the rising edge of the first eight clock cycles of the serial clock with data on all subsequent clock cycles being i gnored. to carry out a second successive write operation, the rd/ wr signal must be brought high and low again. simplifying the serial interface to minimize the number of interconnect lines to the ad7817, the user can connect the cs line to dgnd. this is possible if the ad7817 is not sharing the serial bus with another device. it is also possible to tie the d in and d out lines together. this arrangement is compatible with the 8051 microcontroller. the 68hc11, 68hc05, and pic16cxx can be configured to operate with a single serial data line. in this way the number of lines required to operate the serial interface can be reduced to three, i.e., rd/ wr , sclk, and d in/out see figure 6. ad7816 and ad7818 serial interface mode the serial interface on the ad7816 and ad7818 is a three-wire interface with read and write capabilities. data is read from the output register and the control byte is written to the ad7816 db9 db8 db7 db0 db1 db8 db7 db6 db1 db0 sclk d in 13 2 123 910 rd/ wr cs t 4 t 7 t 10 t 14a t 14b t 13 t 12 t 11 t 8 t 9 t 5 t 6 8 7 control byte d out figure 20. ad7817 serial interface timing diagram and ad7818 via the d in/out line. the part operates in a slave mode and requires an externally applied serial clock to the sclk input to access data from the data register or write the control byte. the rd/ wr line is used to determine whether data is being written to or read from the ad7816 and ad7818. when data is being written to the devices the rd/ wr line is set logic low and when data is being read from the part the line is set logic highsee figure 21. the serial interface on the ad7816 and ad7818 are designed to allow the part to be inter- faced to systems that provide a serial clock that is synchronized to the serial data, such as the 80c51, 87c51, 68hc11, 68hc05, and pic16cxx microcontrollers. read operation figure 21 shows the timing diagram for a serial read from the ad7816 and ad7818. the rd/ wr is set logic high to indicate that the data transfer is a serial read from the devices. when rd/ wr is logic high the d in/out pin becomes a logic output and the first data bit (db9) appears on the pin. subsequent bits are clocked out on the falling edge of sclk, starting with the second sclk falling edge after rd/ wr goes high and are valid on the rising edge of sclk. ten bits of data are transferred during a read operation. however the user has the choice of clocking only eight bits if the full ten bits of the conversion result are not required. the serial data can be accessed in a number of bytes if ten bits of data are being read; however, rd/ wr must remain high for the duration of the data transfer operation. to carry out a successive read operation the rd/ wr pin must be brought logic low and high again. at the end of the read operation, the d in/out pin becomes a logic input on the falling edge of rd/ wr . write operation a control byte write operation to the ad7816 and ad7818 is also shown in figure 21. the rd/ wr input goes low to indicate to the p art that a serial write is about to occur. the ad7816 and ad 7818 control bytes are loaded on the rising edge of the first eight clock cycles of the serial clock with data on all subse- quent clock cycles being ignored. to carry out a successive write to the ad7816 or ad7818 the rd/ wr pin must be brought logic high and low again.
C16C c01316C0C8/00 (rev. b) printed in u.s.a. ad7816/ad7817/ad7818 rev. b sclk 13 2 123 910 rd/ wr t 7 t 14a t 13 t 12 t 11 t 8 t 9 t 5 t 6 8 7 control byte db9 db8 db7 db0 db1 db0 db1 db8 db7 db6 d in /d out figure 21. ad7816/ad7 818 serial interface timing diagram outline dimensions dimensions shown in inches and (mm). 16-lead thin shrink small outline package (tssop) (ru-16) 16 9 8 1 0.201 (5.10) 0.193 (4.90) 0.256 (6.50) 0.246 (6.25) 0.177 (4.50) 0.169 (4.30) pin 1 seating plane 0.006 (0.15) 0.002 (0.05) 0.0118 (0.30) 0.0075 (0.19) 0.0256 (0.65) bsc 0.0433 (1.10) max 0.0079 (0.20) 0.0035 (0.090) 0.028 (0.70) 0.020 (0.50) 8 0 8-lead soic package (rm-8) 8 5 4 1 0.122 (3.10) 0.114 (2.90) 0.199 (5.05) 0.187 (4.75) pin 1 0.0256 (0.65) bsc 0.122 (3.10) 0.114 (2.90) seating plane 0.006 (0.15) 0.002 (0.05) 0.018 (0.46) 0.008 (0.20) 0.043 (1.09) 0.037 (0.94) 0.120 (3.05) 0.112 (2.84) 0.011 (0.28) 0.003 (0.08) 0.028 (0.71) 0.016 (0.41) 33 27 0.120 (3.05) 0.112 (2.84) 16-lead narrow body (soic) (r-16a) 16 9 8 1 0.3937 (10.00) 0.3859 (9.80) 0.2440 (6.20) 0.2284 (5.80) 0.1574 (4.00) 0.1497 (3.80) pin 1 seating plane 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0688 (1.75) 0.0532 (1.35) 0.0500 (1.27) bsc 0.0099 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 8 0 0.0196 (0.50) 0.0099 (0.25) x 45 8-lead narrow body (soic) (so-8) 0.1968 (5.00) 0.1890 (4.80) 8 5 4 1 0.2440 (6.20) 0.2284 (5.80) pin 1 0.1574 (4.00) 0.1497 (3.80) 0.0688 (1.75) 0.0532 (1.35) seating plane 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) bsc 0.0098 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 8 0 0.0196 (0.50) 0.0099 (0.25) x 45
package/price information 10 - bit adc, temperature monitoring only in an soic/ soic package * this price is provided for budgetary purposes as recommended list price in u.s. dollars per unit in the stated volume. pricing displayed for evaluation boards and kits is based on 1-piece pricing. view pricing and availability for further information. model status package description pin count temperature range price* (100 - 499) ad7816achips production chips/die sales - military - ad7816ar production std s.o. pkg (soic) 8 military $1.66 ad7816ar - reel production std s.o. pkg (soic) 8 military - ad7816ar - reel7 production std s.o. pkg (soic) 8 military - ad7816arm production micro soic 8 military $1.66 AD7816ARM-REEL production micro soic 8 military - AD7816ARM-REEL7 production micro soic 8 military -

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